General summary
the product development and test engineering group is responsible for design validation, characterization, and production deployment of multiple leading-edge ips for 5g products in the advanced finfet semiconductor process technologies. In this role, you will be a member of a technical team working closely with ic design, software, systems, and operations engineering to enable the high-volume manufacturability of the product.
responsibilities
1. operation of the ate to validate and debug new product functionality.
2. test hw/sw development.
3. characterization across corner conditions.
4. releasing cost-effective production test solutions for mass manufacturing.
the individual selected for this position will need to be able to work in a fast-paced and dynamic environment and be passionate about delivering quality solutions.
preferred qualifications
* master’s degree in electrical, electronics, mecatronica, computer science, or related fields.
* experience with circuit design (e.g., digital, analog, rf), hardware engineering, and hardware design (schematic capture and circuit simulation) or related fields.
* more than 1 year of experience in product development, test validation, and high-volume production activities related to system on chip (soc) - compute, data center, mobile, automotive, iot areas.
* vlsi technologies – digital design, cpu architecture and organization, and semiconductor process.
* domain knowledge in one or more of these areas is a plus: cpu, logic test (atpg), memory (sram, dram interfaces), high-speed serdes, sensor validation, and corresponding test methodologies.
* cmos analog and mixed-signal circuits such as adc, dac, pll, ldo, lna, mixers, power amplifiers, and their performance measurements.
* experience handling measurement test equipment (oscilloscope, signal generator, spectrum analyzer, time interval analyzer, logic analyzer, network analyzer, ate, rohde & schwarz).
* experience with python/c++/java/assembly/embedded sw.
* design for test (dft) techniques and structural tests such as scan/atpg, jtag, and memory bist is a plus.
* hands-on experience with data analysis software (jmp, national instruments, exensio, etc.) is a plus.
* experience with automated test equipment: advantest or teradyne is a plus.
* familiarity with arm, arduino, microcontroller architecture is a plus.
* 2+ years’ experience utilizing schematic capture and circuit simulation software.
minimum qualifications
education: master’s - computer science, bachelors – electrical engineering; phd degrees are a plus.
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