Job title: dram engineering group methodology (degdt) layout designer at micron technology micron technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
we are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all.
with a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, micron delivers a rich portfolio of high-performance dram, nand, and nor memory and storage products through our micron and crucial brands.
about the role as a dram engineering group methodology (degdt) layout designer at micron technology, you will be responsible for translating schematics into layout used for the creation of fabrication reticles.
you will meet all engineering and process-related criteria needed for an assigned dram product, organize and prioritize logistics and resource allocations to meet scheduled deadlines, and proactively develop methodologies for issue resolution.
key responsibilities design and verify all levels of analog and digital layout.
use computer-aided design software (i.e., cadence, calibre, etc.).
work with design engineers to floor plan and design layout.
understand and follow verification protocols.
apply custom and/or automated layout techniques to design pitch, array, and peripheral layout for digital and analog circuits.
develop and maintain technical knowledge.
interface with design engineering to understand layout methodology.
possess basic understanding of circuit design.
understand tape-out processes and procedures.
apply fab process knowledge, including design for manufacturing (dfm) and optical proximity correction (opc).
manage and participate in project-based environment.
prioritize tasks to attain schedules and deadlines.
proactively develop methodologies to resolve issues.
qualifications/requirements 2+ years of experience in layout designs in cmos process.
good understanding of layout fundamentals i.e., electro-migration, latch-up, coupling, crosstalk, ir-drop, parasitic analysis, matching, shielding, etc.
knowledge of schematics, interface with circuit designer and cad team.
problem-solving skills in solving area, power, performance, and physical verification of custom layout.
knowledge of cadence tools including virtuoso schematic editor virtuoso layout l, xl & other verification tools like mentor calibre.
should be able to work in a team environment and be able to guide and provide technical support to fellow team members.
education be/btech or mtech in electronic/vlsi engineering or equivalent; we will also consider exceptionally talented diploma holders in electronic or vlsi engineering.
salary information the estimated salary for this role is $120,000 - $180,000 per year, depending on experience and qualifications.
about micron technology micron technology is an equal opportunity employer and welcomes applications from diverse candidates.
we prohibit the use of child labor and comply with all applicable laws, rules, regulations, and other international and industry labor standards.
we do not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with micron.