Red cell partners is an incubation firm building and investing in rapidly scalable technology-led companies that are bringing revolutionary advancements to market in three distinct practice areas: healthcare, cyber, and national security. United by a shared sense of duty and deep belief in the power of innovation, red cell is developing powerful tools and solutions to address our nation’s most pressing problems.
about claros
claros innovates at the intersection of power and compute. We build advanced semiconductor power management solutions that improve ai compute capacity, efficiency and reliability.
claros is an early-stage startup company located in torrance, ca. If you are looking for challenging work and a strong technical environment with a collaborative & supportive culture, then claros tech is the company for you. We offer industry best competitive pay & benefits and early-stage stock options.
location: minimum of 3 days a week in the office in torrance, ca.
about the team:
we are open-minded, fast-paced problem solvers that value open dialogue and candor. Our passion is to challenge the status-quo and we embrace transformational thinking. Our response is never 'no, but…' instead 'yes, if….' we are mindful of our personal and organizational blinders and try to build an environment where our team members are at their best.
this role will report to: vice president of engineering
role description:
claros inc. is seeking to hire an exceptional senior packaging engineer to join our team in torrance, ca. The candidate must be a self-motivated individual who will work closely with silicon & package design, marketing, npi, assembly/substrate suppliers & customers and is responsible for developing cost-effective high-performance, advanced custom package solutions achieving signal integrity, thermal, structural reliability, substrate fab/package assembly design rules & project schedule requirements.
responsibilities:
* provide deep expertise in 2.5d / 3d technology; current and future customer engagement on technology needs & updates, consolidation of requirements and drive towards unified solution.
* lead in identification, development & qualification; program management with external assembly partners.
* lead in power supplier(s) engagement to define technology and quality requirements.
* interface with other technical teams (di, pkg design, test dev) as part of cross functional team.
* support new design wins, npi and volume ramps.
required qualifications:
* 4-6 years hands-on experience in 2.5d / 3d development; in-depth know-how of advanced silicon fab, bump, interposer, substrate & assembly processes, materials & supplier selection, bom definition, thermal and mechanical interactions.
* hands-on experience with modeling (thermal & mechanical) & sub/pcb design cad tools (apd, autocad, solidworks, etc.) for design optimization.
preferred qualifications:
* master's degree in mechanical/electrical/electronic engineering with 6+ years of relevant experience in developing cost-effective, high-performance (speed, density, pin count, thermal & reliability) single & multi-chip, large, complex, custom & fine pitch flip chip packaging solutions with advanced multi-layer ceramic/organic substrates & interposers.
* sound knowledge of & hands-on experience in advanced, prevailing and emerging silicon, package & substrate technologies, bumping and assembly processes, design rules, failure analysis tools and techniques, materials and equipment, applicable industry standards, regulations & quality systems.
* good team player with project management, analytical, problem-solving and interpersonal skills. Must be self-driven, flexible and agile, result-oriented individual. Ability to develop concepts into structured projects, generate new and innovative solutions to complex problems and handle multiple programs concurrently.
* career track opportunity with potential for rapid advancement with strong performance as the firm grows.
salary range: $150,000-$200,000. This represents the typical salary range for this position based on experience, skills, and other factors.
we’re an equal opportunity employer: you’ll receive consideration for employment without regard to race, sex, color, religion, sexual orientation, gender identity, national origin, protected veteran status, or on the basis of disability.
apply for this job
* indicates a required field
first name *
last name *
email *
phone *
resume/cv *
linkedin profile *
do you have authorization to work in the united states? *
will you require sponsorship now or in the future? *
are you available to work in-person from the office in torrance, ca a minimum of 3 days a week? *
how many years of experience do you have in electronic/ic layout cad specialization or related program? *
how many years of experience do you have in ic layout design in finfet technology node? *
do you have a solid understanding of semiconductor manufacturing process and dfm techniques? *
do you have experience working with silicon in bcd and advanced cmos technologies? *
#j-18808-ljbffr